Research Statement: Yoongu Kim

Today’s data-intensive applications rely increasingly uponmain memory to serve high volumes of data at low latency. In a way, main memory is the first line of defense against the massive explosion of data that we are witnessing. For decades, main memory has derived most of its improvement in cost and performance from the rapid scaling of its physical substrate: DRAM. However, DRAM process technology has now reached a critical juncture, in which serious doubts are being raised about its near-term scalability with regard to capacity, energy-efficiency, latency, bandwidth, and reliability. This has major implications not just for computer architecture, but also for all other layers of the system stack — e.g., operating systems, storage systems, database systems — where main memory plays an important role. Given this landscape, the focus of my research is on developing architectural techniques to enhance the scalability of main memory. My research investigates the evolving requirements for memory at the application-level, as well as the emerging challenges/opportunities at the silicon-level. Ultimately, my goal is to fill the gap between the two levels with a redesigned memory system that is scalable, efficient, and fault-tolerant. In particular, two of my works are already making a real-world impact toward achieving this goal. First, the DRAM standardization committee (i.e., JEDEC) is considering to adopt subarray parallelism [6] as an architectural enhancement to DDR4, the next generation of commodity DRAM. Second, major cloud service providers are assessing their security exposure to disturbance errors [2], which is a new vulnerability in DRAM that could allow different applications — or even virtual machines — to compromise one another. The latter of these two contributions forms the foundation of my thesis. In the remainder of this research statement, I will first discuss the three facets of my prior research: (i) memory architecture, (ii) memory reliability, and (iii) memory quality-of-service. I will then present the directions for my future research. Taken all together, I believe that my research provides a comprehensive treatment for enabling future generations of memory systems.